The Era of Heterogeneous Compute: Challenges and Opportunities

일시: 
2012년 3월 21일 수요일 PM 4:00
장소: 
301 Building, Room 201

요약

The transition to many core computing and the dominant role of energy, power and thermal limits to computation is leading to asymmetry, heterogeneity, and technology diversity being leading drivers for the design of future many core architectures. This transition has coincided with the growth of data intensive computation and throughput oriented computing whose importance has been amplified by the explosive growth of raw data being generated today in all sectors of the global economy. This has led to a disruptive impact on all levels of the application and system software stacks.

This talk will offer a view of this evolution and the resulting software challenges for applications and system. We will advocate the need for dynamic execution environments for addressing many of these challenges and describe some our efforts in this area built using the Ocelot open source dynamic execution environment. Ocelot includes a just-in-time (JIT) compiler for data parallel programs that support multiple back-ends: NVIDIA GPUs, x86 hosts, and vector (SSE) with third party developers targeting AMD GPUs. Current efforts seek to provide multiple front-ends including CUDA, OpenCL, and domain specific languages. Ocelot is central to multiple projects for accelerating data warehousing applications, scientific computation, and embedded computing. The talk will conclude with some opinions about future research directions and opportunities in heterogeneous computing.

연사 소개

Sudhakar Yalamanchili earned his Ph.D degree in Electrical and Computer Engineering in 1984 from the University of Texas at Austin. Upon graduation, he joined Honeywell’s Systems and Research Center in Minneapolis working on embedded multiprocessor architectures from 1984 to 1989. He joined the ECE faculty at Georgia Tech in 1989 where he is now a Joseph M. Pettit Professor of Computer Engineering. He is the author of VHDL Starters Guide, 2nd edition, Prentice Hall, 2004, VHDL: From Simulation to Synthesis, Prentice Hall, 2000, and co-author with J. Duato and L. Ni, of Interconnection Networks: An Engineering Approach, Morgan Kaufman, 2003. His current research foci lie in addressing the software challenges of heterogeneous architectures and solutions to power and thermal issues in many core architectures and data centers. Since 2003 he has been a Co-Director of the NSF Industry University Cooperative Research Center on Experimental Computer Systems at Georgia Tech. Dr. Yalamanchili has served several periods as the Chair of the Computer Engineering Technical Interest Group within the School of ECE (most recently 2008-2010) and continues to contribute professionally on editorial boards and program committees. He currently serves in the Research Advisory Group to the HyperTransport Consortium and on the Editorial Board of IEEE Computer Society’s Computer Architecture Letters. Most recently he has served as the General Co-Chair of the 2010 IEEE/ACM International Symposium on Microarchitecture (MICRO) and Program Committees for the 2011 IEEE/ACM International Symposium on Microarchitecture (MICRO), 2012 International Symposium on Networks on Chip (NOCS) and 2011 IEEE Micro: Top Picks from Computer Architecture Conferences.