Systems Research at IBM ARL

■ Date: October 17 (Friday)

■ Time: 10:30 am – 15:00 pm

■ Place: Room 201, Building 301

Seminar 1 10:30-11:30	IBM Research Overview and OpenPOWER Dr. Fadi Gebara Abstract In this talk I will present 2 topics. First I will give an overview of IBM Research along with a various way we collaborate with academic institutions. The second half of the talk will cover the Open POWER foundation along with example technologies that enable differentiated, optimized systems. Bio Dr. Gebara received his B.S., M.S., and Ph.D. degrees in electrical engineering from the University of Michigan, Ann Arbor, in 2000, 2002, and 2005, respectively. In 2004, he joined the IBM Austin Research Laboratory, where he has been a Research Staff Member since 2004 and became manager of the Optimized Systems group in 2011 and Sr. Manager in 2012. During his time at IBM, his research interests included clocking strategies for high-performance microprocessors, on-chip performance sensors, and SRAM (static random-access memory) array architectures. Currently, he is researching Big Data analytics and its implications to systems. Dr. Gebara has authored over 35 patents and numerous publications.
Seminar 2 11:30-12:30	Exploring Models of Computation and the Consequences for Systems for Big Data Dr. Peter Hofstee Abstract This talk is an attempt to come to grips with fundamental distinctions underlying the different computational frameworks for Big Data. Our main goal is to better understand how to optimize Big Data systems. We also believe our approach may aid in teaching. We show how common approaches like Hadoop, SPARK, MPI, and OpenMP and Streams relate. Finally we discuss a system built on OpenPOWER technology that leverages flash as memory. We show how such a system might fit our framework and we discuss the system-level benefits that such an approach can bring. Bio Dr. Peter Hofstee currently works at the IBM Austin Research Laboratory on workload-optimized and hybrid systems. Peter has degrees in theoretical physics (MS, Rijks Universiteit Groningen, Netherlands) and computer science (PhD, California Inst. of Technology). At IBM Peter has worked on microprocessors, including the first CMOS processor to demonstrate GHz operation (1997), and he was the chief architect of the synergistic processor elements in the Cell Broadband Engine, known from its use in the Sony Playstation 3 and the Roadrunner supercomputer that first broke the 1 Petaflop Linpack benchmark. His interests include VLSI, multicore and heterogeneous microprocessor architecture, security, system design and programming. Peter has over 100 patents issued or pending.
12:30-14:00	Lunch
Seminar 3 14:00-15:00	Flash Storage System Research at IBM Austin Dr. Jente B. Kuang Abstract In this presentation, I will first go over IBM's enterprise All Flash Storage system and solution. The solid state storage business was formerly known as Texas Memory Systems acquired in 2012, rapidly worked itself into IBM's server business with reliability enhancement and seamless integration with various analytics platforms. In the second part, I will present the current Flash research activities at the Austin Lab as well as a project example that highlights the requirements of enterprise grade operations in firmware and hardware controller. Bio Dr. J.B. Kuang is research staff member at IBM's Austin Research Lab. He received BS, MS, and PhD degree from National Taiwan (1982), Columbia (1986), and Cornell (1990) University, respectively, all in electrical engineering. Since 1990, he's worked on various disciplines of VLSI research and development for BiCMOS and CMOS devices, circuits, and systems, including SRAMs, eDRAMs, register files, non-volatile memories, high-speed double precision floating point unit, low-power/low-voltage circuits, which were used in different generations of servers. His current focus is on the Flash storage system architecture and management firmware implementation.

Contact: 02-880-6768, kchoi@snu.ac.kr (Prof. Kiyoung Choi)